In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.
Responsibilities:
-Conduct cutting-edge research to design chiplet-based systems, with a focus on enabling high-bandwidth and low-latency interconnects across chiplets.
-Investigate various aspects of system design, including:
-Topology exploration, routing algorithms, protocol and flow control design
-Chiplet placement and interposer design strategies
-Fault tolerance and redundancy for yield and reliability
-Programming models and compiler/runtime support
-Prototype and evaluate new architectural innovations, including NoC (Network-on-Chip) enhancements and memory hierarchy design.
-Contribute to long-term research strategy through technical leadership, white papers, and vision documents.
-Publish high-quality research in top-tier conferences and journals (e.g., ISCA, MICRO, HPCA, ASPLOS, etc.).
Requirements:
-PhD in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
-Strong background in interconnection networks and computer architecture is a must.
-Demonstrated research expertise in one or more of the following areas:
-Network-on-Chip (NoC) architecture, including routing, flow control, topologies, and performance modeling
-Packaging technologies (e.g., 2.5D/3D integration, silicon interposers)
-Programming models and hardware/software interfaces (e.g., load/store, message-passing, RDMA, shared memory models)
-System-level modeling and simulation (e.g., cycle-accurate simulators)
-Proven publication record in relevant peer-reviewed venues.
-Excellent analytical, problem-solving, and system-level thinking skills.
-Strong verbal and written communication skills, and the ability to work both independently and collaboratively in a cross-disciplinary team.
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